SUNNYVALE, Calif., Feb. 13, 2025 — Synopsys, Inc. (Nasdaq: SNPS) today announced the expansion of its hardware-assisted verification (HAV) portfolio with new HAPS prototyping and ZeBu emulation systems using AMD Versal Premium VP1902 adaptive SoC. Synopsys said the next generation HAPS-200 prototyping and ZeBu-200 emulation systems deliver improved runtime performance, better compile time and improved debug productivity. They are […]
Synopsys Expands Hardware-Assisted Verification Portfolio for Semiconductor Design
February 14, 2025 by
Alibaba, Apple and Synopsys Join Ultra Accelerator Link Consortium Board
January 14, 2025 by
Beaverton, Ore. – Jan. 14, 2025 – The Ultra Accelerator Link Consortium, developer of the UALink for AI clusters, has announced the expansion of its board of directors with the election of Alibaba Cloud Computing Ltd., Apple Inc., and Synopsys Inc. UALink said the new board members will share their industry knowledge for development and […]
Synopsys and SiMa.ai in Collaboration to Develop Automotive Edge AI Solutions
December 17, 2024 by
Dec 17, 2024, SUNNYVALE, Calif. and SAN JOSE, Dec. 17, 2024 — Synopsys (Nasdaq: SNPS) and SiMa.ai today announced a collaboration to deliver a solution for automotive companies to accelerate development of workload-specific silicon and software needed to power AI-enabled features. The solution will combine Synopsys’ EDA, automotive-grade IP, and hardware-assisted verification solutions with SiMa.ai’s machine learning accelerator (MLA) IP and ML software […]
Synopsys Announces Ultra Ethernet and UALink IP Solutions to Connect AI Accelerator Clusters
December 11, 2024 by
SUNNYVALE, Calif., Dec. 11, 2024 — Synopsys, Inc. (Nasdaq: SNPS) today announced the industry’s first Ultra Ethernet IP and UALink IP solutions, including controllers, PHYs, and verification IP, to meet the demand for standards-based, high-bandwidth, and low-latency HPC and AI accelerator interconnects. As hyperscale data center infrastructures evolve to support the processing of trillions of parameters in large language models, they must scale to […]
Rapidus Collaborates with Synopsys on Semiconductor Design
December 11, 2024 by
TOKYO, SEMICON Japan, Dec. 10, 2024 – Rapidus Corporation, a manufacturer of advanced logic semiconductors, today announced that it has signed an agreement with Synopsys Inc., a provider of silicon to systems design solutions, intended to enable a solution that will shorten design cycle time, using a new approach to natively model process sensitivity and variation in the design steps. […]
PCIe 7.0: Enabling Next Gen AI Accelerator Interconnects in HPC Data Centers
July 3, 2024 by
Scaling data centers for evolving AI models will help alleviate data bottlenecks by distributing workloads across thousands of GPUs. This extends beyond the capabilities of individual accelerators or processors ….
Synopsys Announces PCIe 7.0 IP for HPC-AI Chip Design
June 10, 2024 by
SUNNYVALE, Calif., June 10, 2024 — Synopsys (Nasdaq: SNPS) today announced what it said is the industry’s first PCIe 7.0 IP solution consisting of controller, IDE security module, PHY, and verification IP. The company said the offering will enable chip makers to address demanding bandwidth and latency requirements for transferring massive amounts of data for compute-intensive AI […]
Synopsys Says it Has First 1.6T Ethernet IP Solution for AI and Hyperscale Chips
February 29, 2024 by
SUNNYVALE, Calif., Feb. 29, 2023 – Synopsys, Inc. (Nasdaq: SNPS) today delivered what it said is a dramatic increase in bandwidth and throughput for data-intensive AI workloads with the industry’s first complete 1.6T Ethernet IP solution. Hyperscale data centers, a backbone in the era of pervasive intelligence, require high-bandwidth, low-latency chips and interfaces to process […]
Synopsys Work Flows Certified for Next-Generation Mobile and HPC Designs on TSMC N3E and N4P Processes
June 13, 2022 by
MOUNTAIN VIEW, Calif., June 13, 2022 — Aiming to help customers optimize performance, power and area (PPA) for next-generation system-on-chips (SoCs) used in mobile and high-performance computing applications, Synopsys, Inc. (Nasdaq: SNPS) today announced that TSMC has certified the Synopsys digital and custom design flows for its N3E and N4P process technologies. In addition, Synopsys’ leading Foundation IP […]
On the Front Lines of AI Automation: Life Sciences and Chip Design
September 9, 2021 by
Given the right task, AI-driven machines can be empowered with supercharged IQs that make the smartest humans look dumb, or at least inefficient. As we watch advances made in task automation, we see it burgeoning into fields previously (last week) thought unimaginable. Two recent reports underline the trend. In one, Carnegie Mellon University is teaming […]
