chip design Archives - High-Performance Computing News Analysis | insideHPC https://insidehpc.com/tag/chip-design/ At the Convergence of HPC, AI and Quantum Fri, 14 Feb 2025 20:48:06 +0000 en-US hourly 1 https://wordpress.org/?v=6.7.2 https://insidehpc.com/wp-content/uploads/2024/06/ihpc-favicon.png chip design Archives - High-Performance Computing News Analysis | insideHPC https://insidehpc.com/tag/chip-design/ 32 32 57143778 Synopsys Expands Hardware-Assisted Verification Portfolio for Semiconductor Design https://insidehpc.com/2025/02/synopsys-expands-hardware-assisted-verification-portfolio-for-semiconductor-design/ Fri, 14 Feb 2025 19:25:22 +0000 https://insidehpc.com/?p=95674

SUNNYVALE, Calif., Feb. 13, 2025 — Synopsys, Inc. (Nasdaq: SNPS) today announced the expansion of its hardware-assisted verification (HAV) portfolio with new HAPS prototyping and ZeBu emulation systems using AMD Versal Premium VP1902 adaptive SoC. Synopsys said the next generation HAPS-200 prototyping and ZeBu-200 emulation systems deliver improved runtime performance, better compile time and improved debug productivity. They are […]

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Rapidus Collaborates with Cadence on 2nm Semiconductor Solutions for HPC-AI https://insidehpc.com/2024/12/rapidus-collaborates-with-cadence-on-2nm-semiconductor-solutions-for-hpc-ai/ Wed, 11 Dec 2024 16:35:13 +0000 https://insidehpc.com/?p=95346

TOKYO, SEMICON Japan, Dec. 10, 2024—Rapidus Corporation, a manufacturer of advanced logic semiconductors, today announced a collaboration with Cadence Design Systems, Inc. to provide co-optimized AI-driven reference design flows and a broad IP portfolio. The new collaboration will support the Rapidus 2nm gate-all-around (GAA) process and leverage the design and manufacturing benefits from its backside power delivery […]

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Rapidus Collaborates with Synopsys on Semiconductor Design https://insidehpc.com/2024/12/rapidus-collaborates-with-synopsys-on-semiconductor-design/ Wed, 11 Dec 2024 16:30:29 +0000 https://insidehpc.com/?p=95344

TOKYO, SEMICON Japan, Dec. 10, 2024 – Rapidus Corporation, a manufacturer of advanced logic semiconductors, today announced that it has signed an agreement with Synopsys Inc., a provider of silicon to systems design solutions, intended to enable a solution that will shorten design cycle time, using a new approach to natively model process sensitivity and variation in the design steps. […]

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AMD to Use AMD EPYC-Powered Google Cloud’s C2D VM Instance for EDA https://insidehpc.com/2022/05/amd-to-use-amd-epyc-powered-google-clouds-c2d-vm-instance-for-eda/ Thu, 19 May 2022 19:08:40 +0000 https://insidehpc.com/?p=89659 Google Cloud and AMD today announced a partnership in which AMD will run electronic design automation (EDA) for its chip-design workloads on Google Cloud, extending the on-premises capabilities of AMD data centers. AMD will also leverage Google Cloud’s global networking, storage, artificial intelligence, and machine learning capabilities to improve upon its hybrid and multicloud strategy […]

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Six Smarter Scheduling Techniques For Optimizing EDA Productivity https://insidehpc.com/2022/04/six-smarter-scheduling-techniques-for-optimizing-eda-productivity/ Wed, 20 Apr 2022 13:00:28 +0000 https://insidehpc.com/?p=89485

[SPONSORED POST] Workload management plays a crucial role in helping design teams share limited resources, boost simulation throughput, and maximize productivity. In this white paper, "Six Smarter Scheduling Techniques For Optimizing EDA Productivity," Altair discusses six valuable techniques to help improve design center productivity. By adopting these techniques and products in the Altair® Accelerator™ portfolio, organizations can realize higher levels of efficiency and performance and dramatically improve productivity with smarter workload scheduling.

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Six Smarter Scheduling Techniques For Optimizing EDA Productivity https://insidehpc.com/white-paper/six-smarter-scheduling-techniques-for-optimizing-eda-productivity/ https://insidehpc.com/white-paper/six-smarter-scheduling-techniques-for-optimizing-eda-productivity/#respond Mon, 18 Apr 2022 21:20:10 +0000 https://insidehpc.com/?post_type=wpdmpro&p=89453

Workload management plays a crucial role in helping design teams share limited resources, boost simulation throughput, and maximize productivity. In this paper, Altair discusses six valuable techniques to help improve design center productivity. By adopting these techniques and products in the Altair® Accelerator™ portfolio, organizations can realize higher levels of efficiency and performance and dramatically improve productivity with smarter workload scheduling.

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On the Front Lines of AI Automation: Life Sciences and Chip Design https://insidehpc.com/2021/09/on-the-front-lines-of-ai-automation-life-sciences-and-chip-design/ Thu, 09 Sep 2021 18:01:17 +0000 https://insidehpc.com/?p=88289

Given the right task, AI-driven machines can be empowered with supercharged IQs that make the smartest humans look dumb, or at least inefficient.  As we watch advances made in task automation, we see it burgeoning into fields previously (last week) thought unimaginable. Two recent reports underline the trend. In one, Carnegie Mellon University is teaming […]

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